 Stephane Eranian
|
20a36e39d5
perf/x86: Fix Intel Ivy Bridge support
|
12 years ago |
 Peter Zijlstra
|
d07bdfd322
perf/x86: Fix USER/KERNEL tagging of samples properly
|
13 years ago |
|
Peter Zijlstra
|
597ed953d7
perf/x86: Make bitfield unsigned
|
13 years ago |
|
Peter Zijlstra
|
3e0091e2b6
perf/x86: Save a few bytes in 'struct x86_pmu'
|
13 years ago |
|
Peter Zijlstra
|
c93dc84cbe
perf/x86: Add a microcode revision check for SNB-PEBS
|
13 years ago |
 Yan, Zheng
|
4b4969b144
perf: Export perf_assign_events()
|
13 years ago |
 Andi Kleen
|
70ab7003de
perf/x86: Don't assume there can be only 4 PEBS events
|
13 years ago |
|
Peter Zijlstra
|
1c2ac3fde3
perf/x86: Fix wrmsrl() debug wrapper
|
13 years ago |
 Peter Zijlstra
|
0780c927a0
perf/x86: Implement cycles:p for SNB/IVB
|
13 years ago |
|
Peter Zijlstra
|
5a425294ee
perf/x86: Fix Intel shared extra MSR allocation
|
13 years ago |
 Jiri Olsa
|
641cc93881
perf: Adding sysfs group format attribute for pmu device
|
13 years ago |
 Ingo Molnar
|
bea95c152d
Merge branch 'perf/hw-branch-sampling' into perf/core
|
13 years ago |
|
Peter Zijlstra
|
f9b4eeb809
perf/x86: Prettify pmu config literals
|
13 years ago |
|
Stephane Eranian
|
d010b3326c
perf: Add callback to flush branch_stack on context switch
|
13 years ago |
|
Stephane Eranian
|
3e702ff6d1
perf/x86: Add LBR software filter support for Intel CPUs
|
13 years ago |
|
Stephane Eranian
|
60ce0fbd07
perf/x86: Implement PERF_SAMPLE_BRANCH for Intel CPUs
|
13 years ago |
|
Stephane Eranian
|
c5cc2cd906
perf/x86: Add Intel LBR mappings for PERF_SAMPLE_BRANCH filters
|
13 years ago |
|
Stephane Eranian
|
b36817e886
perf/x86: Add Intel LBR sharing logic
|
13 years ago |
|
Ingo Molnar
|
737f24bda7
Merge branch 'perf/urgent' into perf/core
|
13 years ago |
 Joerg Roedel
|
1018faa6cf
perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled
|
13 years ago |
|
Peter Zijlstra
|
0c9d42ed4c
perf, x86: Provide means for disabling userspace RDPMC
|
13 years ago |
|
Peter Zijlstra
|
c1d6f42f1a
perf, x86: Implement arch event mask as quirk
|
13 years ago |
 Gleb Natapov
|
ffb871bc91
x86, perf: Disable non available architectural events
|
13 years ago |
 Robert Richter
|
bc1738f6ee
perf, x86: Fix event scheduler for constraints with overlapping counters
|
13 years ago |
|
Gleb Natapov
|
144d31e6f1
perf, intel: Use GO/HO bits in perf-ctr
|
13 years ago |
 Kevin Winchester
|
de0428a7ad
x86, perf: Clean up perf_event cpu code
|
14 years ago |
