 Magnus Damm
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0d4fdbb64f
sh: rework mode pin code
|
16 年之前 |
|
Magnus Damm
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43909a9380
sh: hook up shared div4 clock code to sh7785
|
16 年之前 |
|
Magnus Damm
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e89d53e605
sh: hook up shared mstp32 clock code to sh7785
|
16 年之前 |
|
Magnus Damm
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1823f6d5e6
sh: sh7785 pll configuration from mode pin
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16 年之前 |
|
Magnus Damm
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df109e630f
sh: use shared frequency tables on sh7785
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16 年之前 |
|
Magnus Damm
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c9904dd159
sh: add pll_clk to sh7785
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16 年之前 |
 Paul Mundt
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549b5e358d
sh: clkfwk: Add MSTP bits to SH7785 clock framework.
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16 年之前 |
|
Paul Mundt
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cc96eace48
sh: clkfwk: rate table construction and rounding for SH7785.
|
16 年之前 |
|
Paul Mundt
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a77b5ac0ea
sh: clkfwk: Update SH7785 for refactored clock framework.
|
16 年之前 |
|
Paul Mundt
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253b0887b3
sh: clkfwk: Rework legacy CPG clock handling.
|
16 年之前 |
|
Paul Mundt
|
9fe5ee0efb
sh: clkfwk: Use arch_clk_init() for on-chip clock registration.
|
16 年之前 |
|
Paul Mundt
|
f5c84cf508
sh: clkfwk: Tidy up on-chip clock registration and rate propagation.
|
16 年之前 |
|
Paul Mundt
|
4ff29ff8e8
sh: clkfwk: Consolidate the ALWAYS_ENABLED / NEEDS_INIT mess.
|
16 年之前 |
|
Paul Mundt
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b68d820143
sh: clkfwk: Make recalc return an unsigned long.
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16 年之前 |
 Yoshihiro Shimoda
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65b83427c6
sh: fix sh7785 master clock value
|
17 年之前 |
|
Paul Mundt
|
32351a28a7
sh: Add SH7785 Highlander board support (R7785RP).
|
18 年之前 |
