Ralf Baechle
|
631330f584
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
|
16 years ago |
Kevin Cernekee
|
605b7ef7b7
MIPS: Support 64-byte D-cache line size
|
16 years ago |
Ralf Baechle
|
7fc7316aa8
MIPS: Print the actual detected I-cache associativity on bootup.
|
16 years ago |
Manuel Lauss
|
270717a8a0
MIPS: Alchemy: unify CPU model constants.
|
16 years ago |
Shinya Kuribayashi
|
5864810bc5
MIPS: VR5500: Enable prefetch
|
16 years ago |
Ralf Baechle
|
a8ca8b64e3
MIPS: Avoid destructive invalidation on partial cachelines.
|
16 years ago |
Thomas Bogendoerfer
|
e0cee3eea7
[MIPS] Fix WARNING: at kernel/smp.c:290
|
17 years ago |
Jens Axboe
|
8691e5a8f6
smp_call_function: get rid of the unused nonatomic/retry argument
|
17 years ago |
Ralf Baechle
|
c9c5023d83
[MIPS] Fix buggy use of kmap_coherent.
|
17 years ago |
Ralf Baechle
|
89052bd7b3
[MIPS] Fix build for PNX platforms.
|
17 years ago |
Ralf Baechle
|
39b8d52542
[MIPS] Add support for MIPS CMP platform.
|
17 years ago |
Chris Dearman
|
351336929c
[MIPS] Allow setting of the cache attribute at run time.
|
17 years ago |
Ralf Baechle
|
9c5a3d729c
[MIPS] Handle aliases in vmalloc correctly.
|
17 years ago |
Ralf Baechle
|
234fcd1484
[MIPS] Fix loads of section missmatches
|
17 years ago |
Ralf Baechle
|
2eaa7ec286
[MIPS] Handle I-cache coherency in flush_cache_range()
|
17 years ago |
Joe Perches
|
603e82edf7
arch/mips/: Spelling fixes
|
17 years ago |
Manuel Lauss
|
237cfee1db
[MIPS] Alchemy: Au1210/Au1250 CPU support
|
17 years ago |
Thomas Bogendoerfer
|
e9c33572a9
[MIPS] Use real cache invalidate
|
17 years ago |
Ralf Baechle
|
33202349ef
[MIPS] Remove useless S-cache flushes.
|
17 years ago |
Ralf Baechle
|
526af35e5d
[MIPS] Use pte_present instead of open coded test for _PAGE_PRESENT.
|
17 years ago |
Ralf Baechle
|
a754f70886
[MIPS] Sibyte: resurrect old cache hack.
|
17 years ago |
Ralf Baechle
|
a76ab5c10d
[MIPS] MT: Fix bug in multithreaded kernels.
|
17 years ago |
Ralf Baechle
|
64bfca5cd8
[MIPS] Cache: Provide more information on cache policy on bootup.
|
17 years ago |
Ralf Baechle
|
21a151d8ca
[MIPS] checkfiles: Fix "need space after that ','" errors.
|
17 years ago |
Ralf Baechle
|
10cc352907
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
|
17 years ago |
Ralf Baechle
|
db813fe5a7
[MIPS] Avoid indexed cacheops.
|
17 years ago |
Ralf Baechle
|
641e97f318
[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.
|
17 years ago |
Ralf Baechle
|
e001e52801
[MIPS] Replace use of stext with _stext.
|
18 years ago |
Fuxin Zhang
|
2a21c7300b
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
|
18 years ago |
Ralf Baechle
|
617667ba72
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
|
18 years ago |