Commit History

Autor SHA1 Mensaxe Data
  David Daney 50a41ff292 MIPS: Add support files for hugetlbfs. %!s(int64=16) %!d(string=hai) anos
  David Daney 7e69deb83c MIPS: Hook up Cavium OCTEON in arch/mips. %!s(int64=16) %!d(string=hai) anos
  Shinya Kuribayashi 542c1020ac MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors %!s(int64=16) %!d(string=hai) anos
  Johannes Weiner e66ddf1a45 mips: use generic show_mem() %!s(int64=17) %!d(string=hai) anos
  Thiemo Seufer fb2a27e743 [MIPS] Reimplement clear_page/copy_page %!s(int64=17) %!d(string=hai) anos
  Thiemo Seufer e30ec4525d [MIPS] Split the micro-assembler from tlbex.c. %!s(int64=17) %!d(string=hai) anos
  Ralf Baechle 641e97f318 [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. %!s(int64=17) %!d(string=hai) anos
  Ralf Baechle dde96ca8b3 [MIPS] Use -Werror on subdirectories which build cleanly. %!s(int64=18) %!d(string=hai) anos
  Fuxin Zhang 2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 %!s(int64=18) %!d(string=hai) anos
  Atsushi Nemoto d2af363cfb [MIPS] Kill redundant EXTRA_AFLAGS %!s(int64=18) %!d(string=hai) anos
  Ralf Baechle 9a88cbb522 [MIPS] Unify dma-{coherent,noncoherent.ip27,ip32} %!s(int64=18) %!d(string=hai) anos
  Chris Dearman 9318c51acd [MIPS] MIPS32/MIPS64 secondary cache management %!s(int64=19) %!d(string=hai) anos
  Thiemo Seufer c6281edb1d [MIPS] Kill tlb-andes.c. %!s(int64=19) %!d(string=hai) anos
  Ralf Baechle ec917c2c1a Fixup a few lose ends in explicit support for MIPS R1/R2. %!s(int64=19) %!d(string=hai) anos
  Ralf Baechle f5cfa980e5 Use R4000 TLB routines for SB1 also. %!s(int64=19) %!d(string=hai) anos
  Ralf Baechle 6e760c8dae Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. %!s(int64=20) %!d(string=hai) anos
  Ralf Baechle 875d43e72b [PATCH] mips: clean up 32/64-bit configuration %!s(int64=20) %!d(string=hai) anos
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 %!s(int64=20) %!d(string=hai) anos