 Rajendra Nayak
|
df56556e57
OMAP3 SDRC: Move the clk stabilization delay to the right place
|
16 年之前 |
|
Rajendra Nayak
|
8ff120e530
OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83Mhz
|
16 年之前 |
 Paul Walmsley
|
75f251e3d0
OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on boot
|
16 年之前 |
 Jean Pihet
|
58cda884ec
OMAP3 SDRC: add support for 2 SDRAM chip selects
|
16 年之前 |
|
Paul Walmsley
|
7b7bcefa35
OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL
|
16 年之前 |
 Tero Kristo
|
3afec6332e
OMAP3: Add support for DPLL3 divisor values higher than 2
|
16 年之前 |
|
Paul Walmsley
|
df14e4747a
OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers
|
16 年之前 |
|
Paul Walmsley
|
4267b5d152
OMAP3 SRAM: add more comments on the SRAM code
|
16 年之前 |
|
Paul Walmsley
|
d0ba3922ae
OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change
|
16 年之前 |
|
Paul Walmsley
|
c9812d042a
OMAP3 clock: add a short delay when lowering CORE clk rate
|
16 年之前 |
|
Paul Walmsley
|
6adb8f388e
OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize
|
16 年之前 |
|
Paul Walmsley
|
4519c2bf43
OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz
|
16 年之前 |
|
Paul Walmsley
|
b2abb271a5
OMAP3 SRAM: renumber registers to make space for argument passing
|
16 年之前 |
|
Paul Walmsley
|
fa0406a8d8
OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change
|
16 年之前 |
|
Paul Walmsley
|
d75d9e73cd
OMAP3 clock: add interconnect barriers to CORE DPLL M2 change
|
16 年之前 |
|
Paul Walmsley
|
69d4255b13
OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll
|
16 年之前 |
 Syed Mohammed, Khasim
|
cc26b3b01b
ARM: OMAP3: Add minimal omap3430 support
|
16 年之前 |
