Commit History

Author SHA1 Message Date
  Ralf Baechle 02cf211968 Cleanup the mess in cpu_cache_init. 20 years ago
  Ralf Baechle 8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller 20 years ago
  Ralf Baechle 02416dcf5a Redo RM9000 workaround which along with other DSP ASE changes was 20 years ago
  Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. 20 years ago
  Ralf Baechle 4194318c39 Cleanup decoding of MIPSxx config registers. 20 years ago
  Ralf Baechle 875d43e72b [PATCH] mips: clean up 32/64-bit configuration 20 years ago
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 20 years ago