 Chris Wilson
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bcfbbce822
Revert "drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks"
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14 years ago |
|
Chris Wilson
|
448f53a1ed
drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks
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14 years ago |
|
Chris Wilson
|
f00a3ddf91
drm/i915: IS_IRONLAKE is synonymous with gen == 5
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14 years ago |
 Bryan Freed
|
6d139a87b7
drm/i915: Initialize panel timing registers if VBIOS did not
|
14 years ago |
 Jesse Barnes
|
9f0e7ff4b3
drm/i915: fetch eDP configuration data from the VBT
|
14 years ago |
 Simon Que
|
6a04002bea
i915: Added function to initialize VBT settings
|
14 years ago |
|
Chris Wilson
|
e957d7720a
drm/i915/sdvo: Fix GMBUSification
|
14 years ago |
|
Chris Wilson
|
5ceb0f9bb7
drm/i915: Parse the eDP link configuration from the vBIOS
|
14 years ago |
|
Chris Wilson
|
2896b53975
drm/i915: Don't offset the pin used for crt_ddc
|
14 years ago |
|
Chris Wilson
|
f899fc64cd
drm/i915: use GMBUS to manage i2c links
|
15 years ago |
|
Chris Wilson
|
6edc3242e3
drm/i915/bios: Prevent NULL dereference after allocation failure
|
14 years ago |
|
Chris Wilson
|
44834a67c0
drm/i915: Use the VBT from OpRegion when available (v3)
|
15 years ago |
 Adam Jackson
|
9bc354998f
drm/i915: Honor sync polarity from VBT panel timing descriptors
|
15 years ago |
|
Adam Jackson
|
b1083333de
drm/i915: Fix DDC bus selection for multifunction SDVO
|
15 years ago |
 Joe Perches
|
76e47c30bd
drivers/gpu/drm/i915/intel_bios.c: fix continuation line formats
|
15 years ago |
 Eric Anholt
|
bad720ff3e
drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.
|
15 years ago |
 Zhenyu Wang
|
500a8cc466
drm/i915: parse eDP panel color depth from VBT block
|
15 years ago |
|
Jesse Barnes
|
33814341f2
drm/i915: disable LVDS downclock by default
|
15 years ago |
|
Adam Jackson
|
f2b115e69d
drm/i915: Fix product names and #defines
|
15 years ago |
 Zhao Yakui
|
6363ee6f49
drm/i915: parse child device from VBT
|
15 years ago |
 Shaohua Li
|
29874f44fb
drm/i915: fix gpio register detection logic for BIOS without VBT
|
15 years ago |
|
Zhao Yakui
|
d1fcea6a52
drm/i915: Check whether the LVDS downclock is found in VBT
|
15 years ago |
|
Zhao Yakui
|
28c97730c3
drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS
|
15 years ago |
 Andy Lutomirski
|
181a5336d6
drm/i915: Fix render reclock availability detection.
|
15 years ago |
|
Zhenyu Wang
|
339e5a4c78
drm/i915: Fix SSC frequence for IGDNG
|
15 years ago |
|
Jesse Barnes
|
652c393a33
drm/i915: add dynamic clock frequency control
|
16 years ago |
 David Müller (ELSOFT AG)
|
db54501900
drm/i915: Improve CRTDDC mapping by using VBT info
|
16 years ago |
|
Zhenyu Wang
|
32f9d658ae
drm/i915: Add eDP support on IGDNG mobile chip
|
16 years ago |
|
Zhao Yakui
|
cdaa052b05
drm/I915: Fix offset to DVO timings in LVDS data
|
16 years ago |
 Zhenyu Wang
|
5019914ca3
drm/i915: Fix for LVDS VBT change on IGDNG
|
16 years ago |
