 Chris Wilson
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809b63349c
drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
0a58705b2f
drm/i915: Periodically flush the active lists and requests
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%!s(int64=14) %!d(string=hai) anos |
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Chris Wilson
|
882417851a
drm/i915: Propagate error from flushing the ring
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
b72f3acb71
drm/i915: Handle ringbuffer stalls when flushing
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
63256ec534
drm/i915: Enforce write ordering through the GTT
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
72bfa19c8d
drm/i915: Allow the application to choose the constant addressing mode
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
b5ba177d8d
drm/i915: Poll for seqno completion if IRQ is disabled
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
b13c2b96bf
drm/i915/ringbuffer: Make IRQ refcnting atomic
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
1a1c69762a
Merge branch 'drm-intel-fixes' into drm-intel-next
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
7a1948768c
drm/i915: Emit a request to clear a flushed and idle ring for unbusy bo
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
0be732841f
drm/i915: Wait for the bo if a display flip is pipelined on the other ring
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
0ac74c6b33
drm/i915: Only emit a flush if there is an outstanding gpu write
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
6bda10d152
drm/i915: Completely disable fence pipelining.
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
1ec14ad313
drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNB
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
60de2ba51e
drm/i915: Kill the get_fence tracepoint
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
c6748e09ee
drm/i915: Remove inactive LRU tracking from set_domain_ioctl
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
d9e86c0ee6
drm/i915: Pipelined fencing [infrastructure]
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
87ca9c8a7e
drm/i915: Prevent stalling for a GTT read back from a read-only GPU target
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
7d2cb39c33
drm/i915: Release fenced GTT mapping on suspend
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
3619df035e
Merge branch 'drm-intel-fixes' into drm-intel-next
|
%!s(int64=14) %!d(string=hai) anos |
 Daniel Vetter
|
de18a29e0f
drm/i915: fix regression due to ba3d8d749b01548b9
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
432e58edc9
drm/i915: Avoid allocation for execbuffer object list
|
%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
54cf91dc4e
drm/i915: Split i915_gem_execbuffer into its own file.
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
6299f992c0
drm/i915: Defer accounting until read from debugfs
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%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
2021746e1d
drm/i915: Mark a few functions as __must_check
|
%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
312817a39f
drm/i915: Only save and restore fences for UMS
|
%!s(int64=14) %!d(string=hai) anos |
|
Daniel Vetter
|
c6642782b9
drm/i915: Add a mechanism for pipelining fence register updates
|
%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
caea7476d4
drm/i915: More accurately track last fence usage by the GPU
|
%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
a7a09aebe8
drm/i915: Rework execbuffer pinning
|
%!s(int64=14) %!d(string=hai) anos |
|
Chris Wilson
|
919926aeb3
drm/i915: Thread the pipelining ring through the callers.
|
%!s(int64=14) %!d(string=hai) anos |
