phyus/linux-vybrid_public

作者	SHA1 备注	提交日期
Vipul Kumar Samar	1249979242 CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks	12 年之前
Viresh Kumar	10d8935f46 Viresh has moved	13 年之前
Viresh Kumar	5335a639ec SPEAr: clk: Add Auxiliary Synthesizer clock	13 年之前