Historique des commits

Auteur SHA1 Message Date
  Chris Wilson 780d7cc445 agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M il y a 14 ans
  Jesse Barnes 246d08b8f9 agp/intel: add Ivy Bridge support il y a 14 ans
  Chris Wilson bdb8b975fc agp/intel: Experiment with a 855GM GWB bit il y a 14 ans
  Chris Wilson c97689d886 agp/intel: Flush the chipset write buffers when changing GTT base il y a 14 ans
  Daniel Vetter 201728429d intel-gtt: maximize ggtt size on platforms that support this il y a 14 ans
  Chris Wilson e9e5f8e8d3 Merge branch 'drm-intel-fixes' into HEAD il y a 14 ans
  Chris Wilson 41a5142891 drm/i915,agp/intel: Add second set of PCI-IDs for B43 il y a 14 ans
  Daniel Vetter 1a997ff2a0 intel-gtt: introduce intel_gtt_driver il y a 15 ans
  Daniel Vetter e2404e7c3f agp/intel: make intel-gtt.c into a real source file il y a 15 ans
  Zhenyu Wang 8554048070 intel_agp,i915: Add more sandybridge graphics device ids il y a 15 ans
  Zhenyu Wang 93f5f7f124 agp/intel: use #ifdef idiom for intel-agp.h il y a 15 ans
  Zhenyu Wang 4fefe43562 drm/i915,intel_agp: Add support for Sandybridge D0 il y a 15 ans
  Zhenyu Wang a2757b6fab agp/intel: Add actual definitions of the Sandybridge PTE caching bits. il y a 15 ans
  Daniel Vetter ff7cdd691a agp/intel: introduce intel-agp.h header file il y a 15 ans