 Thomas Gleixner
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e4ec7989b4
MIPS: Convert the irq functions to the new names
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%!s(int64=14) %!d(string=hai) anos |
 David Daney
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0c3263870f
MIPS: Octeon: Rewrite interrupt handling code.
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%!s(int64=14) %!d(string=hai) anos |
 Chandrakala Chavva
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52a0f00b50
MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts.
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%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
1aa2b2782a
MIPS: Octeon: Support 256 MSI on PCIe
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%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
7d9eee6e52
MIPS: Octeon: Make MSI use handle_simple_irq().
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%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
a5decf700b
MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.
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%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
a894f14d7e
MIPS: Octeon: Move MSI code out of octeon-irq.c.
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%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
01a6221a6a
MIPS: Reorganize Cavium OCTEON PCI support.
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%!s(int64=16) %!d(string=hai) anos |
