 Ralf Baechle
|
70e46f48cb
[MIPS] VSMP: Synchronize cp0 counters on bootup.
|
19 years ago |
|
Ralf Baechle
|
781b0f8d4f
[MIPS] VSMP: Fix initialization ordering bug.
|
19 years ago |
|
Ralf Baechle
|
937a801576
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
|
19 years ago |
 Chris Dearman
|
847b9dfcca
[MIPS] MT: Initialise all writable bits in Cause register to zero.
|
19 years ago |
 Thomas Gleixner
|
f40298fddc
[PATCH] irq-flags: MIPS: Use the new IRQF_ constants
|
19 years ago |
|
Ralf Baechle
|
f088fc84f9
[MIPS] FPU affinity for MT ASE.
|
19 years ago |
|
Ralf Baechle
|
41c594ab65
[MIPS] MT: Improved multithreading support.
|
19 years ago |
