Commit History

Author SHA1 Message Date
  Viresh Kumar a45896bd3a SPEAr: clk: Add General Purpose Timer Synthesizer clock 13 years ago
  Viresh Kumar 270b9f421e SPEAr: clk: Add Fractional Synthesizer clock 13 years ago
  Viresh Kumar 5335a639ec SPEAr: clk: Add Auxiliary Synthesizer clock 13 years ago
  Viresh Kumar 55b8fd4f42 SPEAr: clk: Add VCO-PLL Synthesizer clock 13 years ago