Historique des commits

Auteur SHA1 Message Date
  Ralf Baechle fc5d2d279f [MIPS] Use the proper technical term for naming some of the cache macros. il y a 19 ans
  Chris Dearman 2e128dedcd [MIPS] Default cpu_has_mipsmt to a runtime check il y a 19 ans
  Ralf Baechle f41ae0b2b9 [MIPS] Fix configuration of R2 CPU features and multithreading. il y a 19 ans
  David Woodhouse 62c4f0a2d5 Don't include linux/config.h from anywhere else in include/ il y a 19 ans
  Ralf Baechle f088fc84f9 [MIPS] FPU affinity for MT ASE. il y a 19 ans
  Atsushi Nemoto de62893bc0 [MIPS] local_r4k_flush_cache_page fix il y a 19 ans
  Ralf Baechle 0401572a9b MIPS: Reorganize ISA constants strictly as bitmasks. il y a 19 ans
  Ralf Baechle b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2. il y a 19 ans
  Ralf Baechle 02cf211968 Cleanup the mess in cpu_cache_init. il y a 19 ans
  Ralf Baechle 8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller il y a 20 ans
  Ralf Baechle 02416dcf5a Redo RM9000 workaround which along with other DSP ASE changes was il y a 20 ans
  Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. il y a 20 ans
  Ralf Baechle 4194318c39 Cleanup decoding of MIPSxx config registers. il y a 20 ans
  Ralf Baechle 875d43e72b [PATCH] mips: clean up 32/64-bit configuration il y a 19 ans
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 il y a 20 ans