 Stephane Eranian
|
9ad64c0f48
perf/x86: Add support for PEBS Precise Store
|
12 years ago |
|
Stephane Eranian
|
f20093eef5
perf/x86: Add memory profiling via PEBS Load Latency
|
12 years ago |
|
Stephane Eranian
|
9fac2cf316
perf/x86: Add flags to event constraints
|
12 years ago |
|
Stephane Eranian
|
3a54aaa0a3
perf/x86: Improve sysfs event mapping with event string
|
12 years ago |
 Andi Kleen
|
1a6461b128
perf/x86: Support CPU specific sysfs events
|
12 years ago |
 Jacob Shin
|
0fbdad078a
perf/x86: Allow for architecture specific RDPMC indexes
|
12 years ago |
|
Jacob Shin
|
4c1fd17a1c
perf/x86: Move MSR address offset calculation to architecture specific files
|
12 years ago |
 Jiri Olsa
|
20550a4345
perf/x86: Add hardware events translations for Intel P6 cpus
|
12 years ago |
|
Jiri Olsa
|
0bf79d4413
perf/x86: Add hardware events translations for AMD cpus
|
12 years ago |
|
Jiri Olsa
|
43c032febd
perf/x86: Add hardware events translations for Intel cpus
|
12 years ago |
|
Jiri Olsa
|
a47473939d
perf/x86: Make hardware event translations available in sysfs
|
12 years ago |
 Vince Weaver
|
e717bf4e4f
perf/x86: Add support for Intel Xeon-Phi Knights Corner PMU
|
12 years ago |
|
Stephane Eranian
|
20a36e39d5
perf/x86: Fix Intel Ivy Bridge support
|
12 years ago |
 Peter Zijlstra
|
d07bdfd322
perf/x86: Fix USER/KERNEL tagging of samples properly
|
13 years ago |
|
Peter Zijlstra
|
597ed953d7
perf/x86: Make bitfield unsigned
|
13 years ago |
|
Peter Zijlstra
|
3e0091e2b6
perf/x86: Save a few bytes in 'struct x86_pmu'
|
13 years ago |
|
Peter Zijlstra
|
c93dc84cbe
perf/x86: Add a microcode revision check for SNB-PEBS
|
13 years ago |
 Yan, Zheng
|
4b4969b144
perf: Export perf_assign_events()
|
13 years ago |
|
Andi Kleen
|
70ab7003de
perf/x86: Don't assume there can be only 4 PEBS events
|
13 years ago |
|
Peter Zijlstra
|
1c2ac3fde3
perf/x86: Fix wrmsrl() debug wrapper
|
13 years ago |
 Peter Zijlstra
|
0780c927a0
perf/x86: Implement cycles:p for SNB/IVB
|
13 years ago |
|
Peter Zijlstra
|
5a425294ee
perf/x86: Fix Intel shared extra MSR allocation
|
13 years ago |
|
Jiri Olsa
|
641cc93881
perf: Adding sysfs group format attribute for pmu device
|
13 years ago |
 Ingo Molnar
|
bea95c152d
Merge branch 'perf/hw-branch-sampling' into perf/core
|
13 years ago |
|
Peter Zijlstra
|
f9b4eeb809
perf/x86: Prettify pmu config literals
|
13 years ago |
|
Stephane Eranian
|
d010b3326c
perf: Add callback to flush branch_stack on context switch
|
13 years ago |
|
Stephane Eranian
|
3e702ff6d1
perf/x86: Add LBR software filter support for Intel CPUs
|
13 years ago |
|
Stephane Eranian
|
60ce0fbd07
perf/x86: Implement PERF_SAMPLE_BRANCH for Intel CPUs
|
13 years ago |
|
Stephane Eranian
|
c5cc2cd906
perf/x86: Add Intel LBR mappings for PERF_SAMPLE_BRANCH filters
|
13 years ago |
|
Stephane Eranian
|
b36817e886
perf/x86: Add Intel LBR sharing logic
|
13 years ago |
