Commit History

Author SHA1 Message Date
  Deepak Sikri 1b2d4ad585 CLK: SPEAr: Correct index scanning done for clock synths 12 years ago
  Viresh Kumar 10d8935f46 Viresh has moved 13 years ago
  Viresh Kumar 55b8fd4f42 SPEAr: clk: Add VCO-PLL Synthesizer clock 13 years ago