Историја ревизија

Аутор SHA1 Порука Датум
  Pavel Kiryukhin 54fd6441e0 [MIPS] Fix use of smp_processor_id() in preemptible code. пре 17 година
  Ralf Baechle 10cc352907 [MIPS] Allow hardwiring of the CPU type to a single type for optimization. пре 17 година
  Ralf Baechle 641e97f318 [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. пре 17 година
  Ralf Baechle a36920200c [MIPS] Enable support for the userlocal hardware register пре 18 година
  Atsushi Nemoto 53dc80287d [MIPS] FPU ownership management & preemption fixes пре 18 година
  Ralf Baechle fc5d2d279f [MIPS] Use the proper technical term for naming some of the cache macros. пре 19 година
  Chris Dearman 2e128dedcd [MIPS] Default cpu_has_mipsmt to a runtime check пре 19 година
  Ralf Baechle f41ae0b2b9 [MIPS] Fix configuration of R2 CPU features and multithreading. пре 19 година
  David Woodhouse 62c4f0a2d5 Don't include linux/config.h from anywhere else in include/ пре 19 година
  Ralf Baechle f088fc84f9 [MIPS] FPU affinity for MT ASE. пре 19 година
  Atsushi Nemoto de62893bc0 [MIPS] local_r4k_flush_cache_page fix пре 19 година
  Ralf Baechle 0401572a9b MIPS: Reorganize ISA constants strictly as bitmasks. пре 19 година
  Ralf Baechle b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2. пре 19 година
  Ralf Baechle 02cf211968 Cleanup the mess in cpu_cache_init. пре 19 година
  Ralf Baechle 8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller пре 20 година
  Ralf Baechle 02416dcf5a Redo RM9000 workaround which along with other DSP ASE changes was пре 20 година
  Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. пре 20 година
  Ralf Baechle 4194318c39 Cleanup decoding of MIPSxx config registers. пре 20 година
  Ralf Baechle 875d43e72b [PATCH] mips: clean up 32/64-bit configuration пре 19 година
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 пре 20 година