 Ralf Baechle
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a754f70886
[MIPS] Sibyte: resurrect old cache hack.
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пре 17 година |
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Ralf Baechle
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a76ab5c10d
[MIPS] MT: Fix bug in multithreaded kernels.
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пре 17 година |
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Ralf Baechle
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64bfca5cd8
[MIPS] Cache: Provide more information on cache policy on bootup.
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пре 17 година |
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Ralf Baechle
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21a151d8ca
[MIPS] checkfiles: Fix "need space after that ','" errors.
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пре 17 година |
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Ralf Baechle
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10cc352907
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
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пре 17 година |
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Ralf Baechle
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db813fe5a7
[MIPS] Avoid indexed cacheops.
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пре 17 година |
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Ralf Baechle
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641e97f318
[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.
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пре 17 година |
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Ralf Baechle
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e001e52801
[MIPS] Replace use of stext with _stext.
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пре 18 година |
 Fuxin Zhang
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2a21c7300b
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
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пре 18 година |
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Ralf Baechle
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617667ba72
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
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пре 18 година |
 Atsushi Nemoto
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0550d9d13e
[MIPS] Remove redundant r4k_blast_icache() calls
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пре 19 година |
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Atsushi Nemoto
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c59a0f15be
[MIPS] Remove __flush_icache_page
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пре 18 година |
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Ralf Baechle
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a00f631018
[MIPS] c-r4k: Convert init functions from inline to __init.
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пре 19 година |
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Atsushi Nemoto
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f6502791d7
[MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.
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пре 19 година |
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Ralf Baechle
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585fa72493
[MIPS] Retire flush_icache_page from mm use.
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пре 19 година |
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Ralf Baechle
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df586d59a4
[MIPS] c-r4k: Typo fix.
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пре 19 година |
 Yoichi Yuasa
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2874fe5533
[MIPS] vr41xx: Replace magic number for P4K bit with symbol.
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пре 19 година |
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Yoichi Yuasa
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1058ecda9b
[MIPS] vr41xx: Changed workaround to recommended method
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пре 19 година |
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Yoichi Yuasa
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4e8ab36182
[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.
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пре 19 година |
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Ralf Baechle
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fc5d2d279f
[MIPS] Use the proper technical term for naming some of the cache macros.
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пре 19 година |
 Jörn Engel
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6ab3d5624e
Remove obsolete #include <linux/config.h>
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пре 19 година |
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Ralf Baechle
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2e78ae3f48
[MIPS] 74K: Assume it will also have an AR bit in config7
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пре 19 година |
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Ralf Baechle
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beab375a48
[MIPS] Treat CPUs with AR bit as physically indexed.
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пре 19 година |
 Chris Dearman
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73f403527b
[MIPS] Fix handling of 0 length I & D caches.
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пре 19 година |
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Chris Dearman
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9318c51acd
[MIPS] MIPS32/MIPS64 secondary cache management
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пре 19 година |
 Sergei Shtylyov
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9370b35175
[MIPS] Save write-only Config.OD from being clobbered
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пре 19 година |
 Kumba
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44d921b246
[MIPS] Treat R14000 like R10000.
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пре 19 година |
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Ralf Baechle
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7f3f1d01a9
[MIPS] Fix deadlock on MP with cache aliases.
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пре 19 година |
 Nigel Stephens
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98a41de99a
[MIPS] Add missing 34K processor IDs
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пре 19 година |
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Atsushi Nemoto
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3c68da798a
[MIPS] Use __ffs() instead of ffs() for waybit calculation.
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пре 19 година |
