 Ralf Baechle
|
21a151d8ca
[MIPS] checkfiles: Fix "need space after that ','" errors.
|
17 years ago |
 Atsushi Nemoto
|
87d43dd48d
[MIPS] Change names of local variables to silence sparse (part 2)
|
18 years ago |
 Marc St-Jean
|
9267a30d1d
[MIPS] PMC MSP71xx mips common
|
18 years ago |
|
Ralf Baechle
|
a36920200c
[MIPS] Enable support for the userlocal hardware register
|
18 years ago |
|
Ralf Baechle
|
4b3e975e4a
[MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
|
18 years ago |
|
Ralf Baechle
|
2472d0b519
[MIPS] Remove unused R10000 performance counter definitions.
|
18 years ago |
 Yoichi Yuasa
|
2874fe5533
[MIPS] vr41xx: Replace magic number for P4K bit with symbol.
|
19 years ago |
|
Ralf Baechle
|
192ef36619
[MIPS] TRACE_IRQFLAGS_SUPPORT support.
|
19 years ago |
|
Yoichi Yuasa
|
4e8ab36182
[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.
|
19 years ago |
|
Ralf Baechle
|
4277ff5ee5
[MIPS] Fix use of ehb instruction for non-R2 configurations.
|
19 years ago |
 Linus Torvalds
|
cee4cca740
Merge git://git.infradead.org/hdrcleanup-2.6
|
19 years ago |
|
Ralf Baechle
|
1bd5e16168
[MIPS] Cleanup __emt() a bit.
|
19 years ago |
 Thiemo Seufer
|
3301edcbd7
[MIPS] DSP and MDMX share the same config flag bit.
|
19 years ago |
 David Woodhouse
|
62c4f0a2d5
Don't include linux/config.h from anywhere else in include/
|
19 years ago |
|
Ralf Baechle
|
41c594ab65
[MIPS] MT: Improved multithreading support.
|
19 years ago |
|
Ralf Baechle
|
15c4f67ab8
[MIPS] Provide access functions for c0_badvaddr.
|
19 years ago |
|
Ralf Baechle
|
264879576c
MIPS: DSP: Put mask field into the right place.
|
19 years ago |
|
Ralf Baechle
|
340ee4b98c
Virtual SMP support for the 34K.
|
20 years ago |
|
Ralf Baechle
|
0952e2905c
Fix parenthesis in macros.
|
20 years ago |
 Pete Popov
|
bdf21b18b4
Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
|
20 years ago |
|
Ralf Baechle
|
8f40611d2b
Detect the MIPS R2 vectored interrupt, external interrupt controller
|
20 years ago |
|
Ralf Baechle
|
699dbc90e8
Macros to access the register of processors using the new MIPS
|
20 years ago |
|
Ralf Baechle
|
7a0fc58cd9
A few more macros to access MIPS R2 architecture registers.
|
20 years ago |
|
Ralf Baechle
|
e20368d5df
Get the thing to compile again ...
|
20 years ago |
 Maciej W. Rozycki
|
c6ad7b7d3c
Use macros for the RM7k cp0.config bits instead of magic numbers.
|
20 years ago |
|
Ralf Baechle
|
478489dd2c
Remove dead code which was causing warnings.
|
20 years ago |
|
Ralf Baechle
|
e50c0a8fa6
Support the MIPS32 / MIPS64 DSP ASE.
|
20 years ago |
|
Ralf Baechle
|
4194318c39
Cleanup decoding of MIPSxx config registers.
|
20 years ago |
|
Thiemo Seufer
|
ba5187dbb4
Better interface to run uncached cache setup code.
|
20 years ago |
|
Ralf Baechle
|
0efe27617e
Provide functions to access cop0 config4-7 registers
|
20 years ago |
