Commit History

Author SHA1 Message Date
  Rusty Russell 98a79d6a50 cpumask: centralize cpu_online_map and cpu_possible_map 16 years ago
  Ralf Baechle 39b8d52542 [MIPS] Add support for MIPS CMP platform. 17 years ago
  Chris Dearman 0bfa130e74 [MIPS] Remove TLB sanitation code 17 years ago
  Ralf Baechle 87353d8ac3 [MIPS] SMP: Call platform methods via ops structure. 17 years ago
  Ralf Baechle 0ab7aefc4d [MIPS] MT: Scheduler support for SMT 18 years ago
  Ralf Baechle 49a89efbbb [MIPS] Fix "no space between function name and open parenthesis" warnings. 17 years ago
  Ralf Baechle 428ab280a0 [MIPS] SMP: Scatter __cpuinit over the code as needed. 18 years ago
  Ralf Baechle 8c976e3451 [MIPS] VSMP: Fix initialization ordering bug. 18 years ago
  Chris Dearman ffe9ee4709 [MIPS] Separate performance counter interrupts 18 years ago
  Atsushi Nemoto 97dcb82de6 [MIPS] Define MIPS_CPU_IRQ_BASE in generic header 18 years ago
  Atsushi Nemoto 1417836e81 [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq 18 years ago
  Ralf Baechle 70e46f48cb [MIPS] VSMP: Synchronize cp0 counters on bootup. 18 years ago
  Ralf Baechle 781b0f8d4f [MIPS] VSMP: Fix initialization ordering bug. 18 years ago
  Ralf Baechle 937a801576 [MIPS] Complete fixes after removal of pt_regs argument to int handlers. 18 years ago
  Chris Dearman 847b9dfcca [MIPS] MT: Initialise all writable bits in Cause register to zero. 19 years ago
  Thomas Gleixner f40298fddc [PATCH] irq-flags: MIPS: Use the new IRQF_ constants 19 years ago
  Ralf Baechle f088fc84f9 [MIPS] FPU affinity for MT ASE. 19 years ago
  Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support. 19 years ago