 David Daney
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fbeda19f82
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
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%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
41f0e4d041
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
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%!s(int64=16) %!d(string=hai) anos |
 Ralf Baechle
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47740eb887
MIPS: Enable CLO / CLZ instructions via separate CPU property
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
47d979eca3
MIPS: Hook Cavium OCTEON cache init into cache.c
|
%!s(int64=16) %!d(string=hai) anos |
|
Ralf Baechle
|
c46b302b94
MIPS: New feature test macro cpu_has_mips_r
|
%!s(int64=16) %!d(string=hai) anos |
|
Ralf Baechle
|
384740dc49
MIPS: Move headfiles to new location below arch/mips/include
|
%!s(int64=16) %!d(string=hai) anos |
