Commit History

Autor SHA1 Mensaxe Data
  Nicolas Pitre 3902a15e78 [ARM] xsc3: add highmem support to L2 cache handling code %!s(int64=16) %!d(string=hai) anos
  Dan Williams c7cf72dcad [ARM] xsc3: fix xsc3_l2_inv_range %!s(int64=16) %!d(string=hai) anos
  Russell King 0ba8b9b273 [ARM] cputype: separate definitions, use them %!s(int64=16) %!d(string=hai) anos
  Eric Miao 905a09d57a [ARM] pxa: add support for L2 outer cache on XScale3 (attempt 2) %!s(int64=17) %!d(string=hai) anos