 Ben Widawsky
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c4ae25ecdf
Revert "drm/i915: Calculate correct stolen size for GEN7+"
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12 years ago |
 Ville Syrjälä
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a65851af59
drm/i915: Make data/link N value power of two
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12 years ago |
 Paulo Zanoni
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dc4bd2d109
drm/i915: preserve the PBC bits of TRANS_CHICKEN2
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12 years ago |
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Paulo Zanoni
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3f704fa277
drm/i915: set CPT FDI RX polarity bits based on VBT
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12 years ago |
 Chris Wilson
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3ebecd07d3
drm/i915: Scale ring, rather than ia, frequency on Haswell
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12 years ago |
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Ville Syrjälä
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3a06247830
drm/i915: Increase max fence pitch limit to 256KB on IVB+
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12 years ago |
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Ville Syrjälä
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a6f429a5a2
drm/i915: Configure GAM_ECOCHK appropriatly for Gen7
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12 years ago |
|
Ville Syrjälä
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3b9d7888df
drm/i915: Add ECOBITS_SNB_BIT
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12 years ago |
|
Ben Widawsky
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88a2b2a32d
drm/i915: Don't wait for PCH on reset
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12 years ago |
 Jesse Barnes
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a0e4e199ad
drm/i915: add Punit read/write routines for VLV v2
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12 years ago |
|
Jesse Barnes
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453c542059
drm/i915: panel power sequencing for VLV eDP v2
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12 years ago |
|
Jesse Barnes
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7f1f3851fe
drm/i915: sprite support for ValleyView v4
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12 years ago |
|
Jesse Barnes
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8a5c2ae753
drm/i915: fix ILK GPU reset for render
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12 years ago |
 Daniel Vetter
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73c352a265
drm/i915: wire up SDVO hpd support on cpt/ppt
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12 years ago |
 Egbert Eich
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e5868a318d
DRM/i915: Convert HPD interrupts to make use of HPD pin assignment in encoders (v2)
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12 years ago |
 Rodrigo Vivi
|
92bd1bf089
drm/i915: HSW PM Frequency bits fix
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12 years ago |
|
Ben Widawsky
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e3dff58550
drm/i915: Implement WaSwitchSolVfFArbitrationPriority
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12 years ago |
|
Jesse Barnes
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12569ad6ea
drm/i915: DSPFW and BLC regs are in the display offset range
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12 years ago |
|
Jesse Barnes
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ed5de3995f
drm/i915: add media well to VLV force wake routines v2
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12 years ago |
|
Daniel Vetter
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0d4a42f6bd
Merge tag 'v3.9-rc3' into drm-intel-next-queued
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12 years ago |
|
Jesse Barnes
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d62b4892f3
drm/i915: allow force wake at init time on VLV v2
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12 years ago |
 Patrik Jakobsson
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60222c0c2b
drm/i915: Fix incorrect definition of ADPA HSYNC and VSYNC bits
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12 years ago |
|
Paulo Zanoni
|
4f3a8bc7ba
drm/i915: rename some HDMI bit definitions
|
12 years ago |
|
Paulo Zanoni
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dc0fa71811
drm/i915: remove duplicated SDVO/HDMI bit definitions
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12 years ago |
|
Paulo Zanoni
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c20cd31252
drm/i915: unify the definitions of the HDMI/SDVO register
|
12 years ago |
|
Paulo Zanoni
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e2debe919a
drm/i915: clarify confusion between SDVO and HDMI registers
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12 years ago |
|
Rodrigo Vivi
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7d9bcebe13
drm/i915: Use cpu_transcoder for HSW_TVIDEO_DIP_* instead of pipe
|
12 years ago |
|
Ville Syrjälä
|
90a72f8774
drm/i915: Refactor gen2 to gen4 vblank interrupt handling
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12 years ago |
|
Paulo Zanoni
|
3f1e109a8b
drm/i915: use FPGA_DBG for the "unclaimed register" checks
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12 years ago |
|
Ville Syrjälä
|
86d3efce2c
drm/i915: Implement pipe CSC based limited range RGB output
|
12 years ago |
