Commit History

Autor SHA1 Mensaxe Data
  Catalin Marinas ad642d9f58 ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas ca57926d53 ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas f4d6477f7f ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops %!s(int64=15) %!d(string=hai) anos
  Russell King 2ffe2da3e7 ARM: dma-mapping: fix for speculative prefetching %!s(int64=15) %!d(string=hai) anos
  Russell King 702b94bff3 ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range %!s(int64=15) %!d(string=hai) anos
  Russell King a9c9147eb9 ARM: dma-mapping: provide per-cpu type map/unmap functions %!s(int64=15) %!d(string=hai) anos
  Russell King 2c9b9c8490 ARM: add size argument to __cpuc_flush_dcache_page %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas 32cfb1b16f ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range %!s(int64=15) %!d(string=hai) anos
  Catalin Marinas 9cba3ccc8f [ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail %!s(int64=16) %!d(string=hai) anos
  Catalin Marinas 141fa40cff [ARM] 3356/1: Workaround for the ARM1136 I-cache invalidation problem %!s(int64=19) %!d(string=hai) anos
  Nicolas Pitre 18afea04f1 [ARM] 3294/1: don't invalidate individual BTB entries on ARMv6 %!s(int64=19) %!d(string=hai) anos
  Gen FUKATSU 217874feed [ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S %!s(int64=19) %!d(string=hai) anos
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 %!s(int64=20) %!d(string=hai) anos