 Will Deacon
|
bf3f0f332f
ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2
|
12 years ago |
 Paul Gortmaker
|
8bd26e3a7e
arm: delete __cpuinit/__CPUINIT usage from all ARM users
|
12 years ago |
 Cyril Chemparathy
|
4756dcbfd3
ARM: LPAE: accomodate >32-bit addresses for page table base
|
13 years ago |
|
Cyril Chemparathy
|
a7fbc0d62a
ARM: LPAE: factor out T1SZ and TTBR1 computations
|
13 years ago |
|
Cyril Chemparathy
|
13f659b0f3
ARM: LPAE: use phys_addr_t in switch_mm()
|
13 years ago |
|
Will Deacon
|
ae8a8b9553
ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead
|
12 years ago |
 Ben Dooks
|
78305c8630
ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id
|
12 years ago |
|
Ben Dooks
|
251019fb97
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
|
12 years ago |
|
Will Deacon
|
26ffd0d43b
ARM: mm: introduce present, faulting entries for PAGE_NONE
|
13 years ago |
|
Will Deacon
|
dbf62d5006
ARM: mm: introduce L_PTE_VALID for page table entries
|
13 years ago |
 Catalin Marinas
|
1b6ba46b7e
ARM: LPAE: MMU setup for the 3-level page table format
|
13 years ago |
