Commit History

Autor SHA1 Mensaxe Data
  Catalin Marinas 2eb8c82bc4 [ARM] 4503/1: nommu: Add noMMU support for ARMv7 %!s(int64=18) %!d(string=hai) anos
  Catalin Marinas 7092fc38ee [ARM] 4498/1: ARMv7: Remove the L2 cache configuration via the aux ctrl register %!s(int64=18) %!d(string=hai) anos
  Catalin Marinas 2ccdd1e77d [ARM] 4394/1: ARMv7: Add the TLB range operations %!s(int64=18) %!d(string=hai) anos
  Catalin Marinas bbe888864e [ARM] armv7: add support for ARMv7 cores. %!s(int64=18) %!d(string=hai) anos