 Peter Zijlstra
|
63b6a6758e
perf events, x86: Fix Intel Nehalem and Westmere last level cache event definitions
|
14 years ago |
 Don Zickus
|
2bce5daca2
perf, x86, nmi: Move LVT un-masking into irq handlers
|
14 years ago |
 Ingo Molnar
|
ec75a71634
perf events, x86: Work around the Nehalem AAJ80 erratum
|
14 years ago |
 Peter Zijlstra
|
18a073a3ac
perf, x86: Fix BTS condition
|
14 years ago |
|
Peter Zijlstra
|
f4929bd372
perf, x86: Update/fix Intel Nehalem cache events
|
14 years ago |
 Andi Kleen
|
b2508e828d
perf: Support Xeon E7's via the Westmere PMU driver
|
14 years ago |
 Lin Ming
|
6909262429
perf: Avoid the percore allocations if the CPU is not HT capable
|
14 years ago |
|
Andi Kleen
|
e994d7d23a
perf: Fix LLC-* events on Intel Nehalem/Westmere
|
14 years ago |
|
Andi Kleen
|
a7e3ed1e47
perf: Add support for supplementary event registers
|
14 years ago |
 Stephane Eranian
|
17e3162972
perf_events: Update PEBS event constraints
|
14 years ago |
|
Ingo Molnar
|
888a8a3e9d
Merge branch 'perf/urgent' into perf/core
|
14 years ago |
|
Lin Ming
|
b06b3d4969
perf, x86: Add Intel SandyBridge CPU support
|
14 years ago |
 Robert Richter
|
41bf498949
perf, x86: Calculate perfctr msr addresses in helper functions
|
14 years ago |
 Linus Torvalds
|
72eb6a7914
Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu
|
14 years ago |
 Tejun Heo
|
0a3aee0da4
x86: Use this_cpu_ops to optimize code
|
14 years ago |
|
Peter Zijlstra
|
7639dae0ca
perf, x86: Provide a PEBS capable cycle event
|
14 years ago |
|
Stephane Eranian
|
b0b2072df3
perf_events: Fix BTS interrupt handling to avoid being dazed by NMI (v2)
|
15 years ago |
|
Peter Zijlstra
|
a4eaf7f146
perf: Rework the PMU methods
|
15 years ago |
|
Peter Zijlstra
|
de725dec9d
perf, x86: Fix handle_irq return values
|
15 years ago |
|
Don Zickus
|
2e556b5b32
perf, x86: Fix accidentally ack'ing a second event on intel perf counter
|
15 years ago |
 Zhang, Yanmin
|
351af0725e
perf, x86: Fix Intel-nhm PMU programming errata workaround
|
15 years ago |
|
Stephane Eranian
|
d11007703c
perf_events: Fix Intel Westmere event constraints
|
15 years ago |
|
Peter Zijlstra
|
ab608344bc
perf, x86: Improve the PEBS ABI
|
15 years ago |
|
Robert Richter
|
31fa58af57
perf, x86: Pass enable bit mask to __x86_pmu_enable_event()
|
15 years ago |
|
Ingo Molnar
|
ca7e0c6120
Merge branch 'linus' into perf/core
|
15 years ago |
 Vince Weaver
|
134fbadf02
perf, x86: Enable Nehalem-EX support
|
15 years ago |
|
Peter Zijlstra
|
40b91cd10f
perf, x86: Add Nehalem programming quirk to Westmere
|
15 years ago |
|
Peter Zijlstra
|
caaa8be3b6
perf, x86: Fix __initconst vs const
|
15 years ago |
|
Peter Zijlstra
|
b4cdc5c264
perf, x86: Fix up the ANY flag stuff
|
15 years ago |
|
Robert Richter
|
a098f4484b
perf, x86: implement ARCH_PERFMON_EVENTSEL bit masks
|
15 years ago |
