 Keith Packard
|
417e822dee
drm/i915: Treat PCH eDP like DP in most places
|
13 years ago |
 Eric Anholt
|
9ca1d10d74
drm/i915: Turn on another required clock gating bit on gen6.
|
13 years ago |
|
Eric Anholt
|
406478dc91
drm/i915: Turn on a required 3D clock gating bit on Sandybridge.
|
13 years ago |
 Adam Jackson
|
8282049039
drm/i915: intel_choose_pipe_bpp_dither messages should be DRM_DEBUG_KMS
|
13 years ago |
 Daniel Vetter
|
f74974c763
drm/i915: disable temporal dithering on the internal panel
|
13 years ago |
 Jesse Barnes
|
a487928908
drm/i915: remove transcoder PLL mashing from mode_set per specs
|
13 years ago |
|
Jesse Barnes
|
4c9c18c293
drm/i915: if transcoder disable fails, say which
|
13 years ago |
|
Jesse Barnes
|
d6c892df7e
drm/i915: set watermarks for third pipe on IVB
|
13 years ago |
|
Jesse Barnes
|
d4270e57ef
drm/i915: export a CPT mode set verification function
|
13 years ago |
|
Jesse Barnes
|
d64311ab4b
drm/i915: fix transcoder PLL select masking
|
13 years ago |
|
Jesse Barnes
|
65a21cd653
drm/i915: fix IVB cursor support
|
13 years ago |
|
Jesse Barnes
|
f7cb34d47d
drm/i915: fix debug output for 3 pipe configs
|
13 years ago |
|
Jesse Barnes
|
4b645f1402
drm/i915: add PLL sharing support to handle 3 pipes
|
13 years ago |
|
Jesse Barnes
|
d3ccbe8670
drm/i915: fix PCH PLL assertion check for 3 pipes
|
13 years ago |
|
Jesse Barnes
|
d9d444cbc5
drm/i915: split refclk code out of ironlake_crtc_mode_set
|
14 years ago |
|
Jesse Barnes
|
27f8227b1e
drm/i915: support 3 pipes on IVB+
|
14 years ago |
|
Jesse Barnes
|
4c609cb890
drm/i915: PLL macro cleanup and pipe assertion check
|
14 years ago |
|
Jesse Barnes
|
c4f9c4c2b3
drm/i915: always set FDI composite sync bit
|
13 years ago |
|
Daniel Vetter
|
6fdd4d98e5
drm/i915: properly cancel rps_work on module unload v2
|
14 years ago |
|
Keith Packard
|
9a1f57808a
Merge branch 'fix-pch-refclk' into foo
|
13 years ago |
|
Keith Packard
|
0ac225e569
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
|
Keith Packard
|
9fb526db97
drm/i915: Initialize PCH refclks at modeset init time
|
14 years ago |
|
Keith Packard
|
afffb9dfb6
drm/i915: All PCH refclks are 120MHz
|
14 years ago |
|
Keith Packard
|
99eb6a01e5
drm/i915: Use CK505 as non-SSC source where available
|
14 years ago |
|
Keith Packard
|
199e5d79f1
drm/i915: Fix PCH SSC reference clock settings
|
14 years ago |
|
Keith Packard
|
72bbe58cd9
drm/i915: Allow SSC parameter to override VBT value
|
14 years ago |
|
Keith Packard
|
cd0de039bf
drm/i915: FBC off for ironlake and older, otherwise on by default
|
14 years ago |
 Wu Fengguang
|
e0dac65ed4
drm/i915: pass ELD to HDMI/DP audio driver
|
14 years ago |
|
Keith Packard
|
578393cd1e
drm/i915: Enable dither whenever display bpc < frame buffer bpc
|
14 years ago |
|
Keith Packard
|
7cd015a0a3
drm/i915: Enable dither whenever display bpc < frame buffer bpc
|
14 years ago |
