 Daniel Vetter
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76aaf22016
drm/i915: restore gtt on resume in the drm instead of in intel-gtt.ko
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14 years ago |
 Eric Anholt
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cff458c210
drm/i915: Add support for GPU reset on gen6.
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14 years ago |
|
Eric Anholt
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75a6898ffd
drm/i915: Also reinit the BSD and BLT rings after a GPU reset.
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14 years ago |
 Chris Wilson
|
e624ae8e0d
Merge branch 'drm-intel-fixes' into drm-intel-next
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14 years ago |
 Alex Shi
|
16c59ef33b
drm/i915: Disable FBC on Ironlake to save 1W
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14 years ago |
|
Chris Wilson
|
8c1812ad48
Merge branch 'drm-intel-fixes' into drm-intel-next
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14 years ago |
|
Chris Wilson
|
0aa9927772
drm/i915: Allow powersave modparam to be adjusted at runtime.
|
14 years ago |
|
Chris Wilson
|
17250b7155
drm/i915: Make the inactive object shrinker per-device
|
14 years ago |
|
Chris Wilson
|
78501eac34
drm/i915/ringbuffer: Drop the redundant dev from the vfunc interface
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14 years ago |
 Linus Torvalds
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c48c43e422
Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
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14 years ago |
|
Linus Torvalds
|
092e0e7e52
Merge branch 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl
|
14 years ago |
|
Chris Wilson
|
f00a3ddf91
drm/i915: IS_IRONLAKE is synonymous with gen == 5
|
14 years ago |
|
Chris Wilson
|
549f736582
drm/i915: Enable SandyBridge blitter ring
|
14 years ago |
|
Chris Wilson
|
ae681d969a
drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.
|
15 years ago |
|
Chris Wilson
|
dc96e9b8e3
drm/i915: Try to reset gen2 devices.
|
15 years ago |
|
Chris Wilson
|
069efc1dac
drm/i915: Clear fence registers on GPU reset
|
15 years ago |
|
Chris Wilson
|
dfaae392f4
drm/i915: Clear the gpu_write_list on resetting write_domain upon hang
|
15 years ago |
|
Chris Wilson
|
6eecba33f2
drm/i915: Disable output polling across suspend & resume
|
15 years ago |
 Xiang, Haihao
|
881f47b647
drm/i915: add a new BSD ring buffer for Sandybridge
|
15 years ago |
|
Xiang, Haihao
|
92f49d9cec
drm/i915: fix HAS_BSD with a device info flag
|
15 years ago |
|
Chris Wilson
|
f803aa5532
drm/i915: Clean up bo lists on all hung gpus
|
15 years ago |
|
Chris Wilson
|
77f0123022
drm/i915: Clear GPU read domains on reset
|
15 years ago |
|
Chris Wilson
|
9375e446e7
drm/i915: Clear flushing lists on GPU reset
|
15 years ago |
|
Chris Wilson
|
9fd981413e
drm/i915: After a reset perform a forced modeset
|
15 years ago |
 Kenneth Graunke
|
0573ed4a94
drm/i915: Add support for GPU soft reset on Ironlake.
|
15 years ago |
|
Kenneth Graunke
|
eeccdcac07
drm/i915: Rename graphics reset registers.
|
15 years ago |
|
Kenneth Graunke
|
f49f058619
drm/i915: Actually set the reset bit in i965_reset.
|
15 years ago |
|
Chris Wilson
|
a6c45cf013
drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
|
15 years ago |
|
Chris Wilson
|
e9e5f8e8d3
Merge branch 'drm-intel-fixes' into HEAD
|
15 years ago |
|
Chris Wilson
|
41a5142891
drm/i915,agp/intel: Add second set of PCI-IDs for B43
|
15 years ago |
