Commit History

Author SHA1 Message Date
  Atsushi Nemoto de862b488e [MIPS] TX49XX has prefetch. 19 years ago
  Thiemo Seufer 10a3dabddd Add/Fix missing bit of R4600 hit cacheop workaround. 19 years ago
  Thiemo Seufer 330cfe016b Let r4600 PRID detection match only legacy CPUs, cleanups. 19 years ago
  Ralf Baechle 1d40cfcd34 Avoid SMP cacheflushes. This is a minor optimization of startup but 20 years ago
  Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2 20 years ago