 Ralf Baechle
|
417a5eb02c
MIPS: Update comment for cpu_has_clo_clz
|
15 years ago |
 David Daney
|
6dd9344cfc
MIPS: Implement Read Inhibit/eXecute Inhibit
|
15 years ago |
 Guenter Roeck
|
91dfc423cc
MIPS: 64-bit: Detect virtual memory size
|
15 years ago |
|
David Daney
|
b791d1193a
MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
|
16 years ago |
|
David Daney
|
fbeda19f82
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
|
16 years ago |
|
David Daney
|
41f0e4d041
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
|
16 years ago |
|
Ralf Baechle
|
47740eb887
MIPS: Enable CLO / CLZ instructions via separate CPU property
|
16 years ago |
|
David Daney
|
47d979eca3
MIPS: Hook Cavium OCTEON cache init into cache.c
|
16 years ago |
|
Ralf Baechle
|
c46b302b94
MIPS: New feature test macro cpu_has_mips_r
|
16 years ago |
|
Ralf Baechle
|
384740dc49
MIPS: Move headfiles to new location below arch/mips/include
|
16 years ago |
