 David Daney
|
70dc6f045f
MIPS: Clean up notify_die() usage.
|
15 rokov pred |
|
David Daney
|
7281cd2297
MIPS: Remove unused task_struct.trap_no field.
|
15 rokov pred |
|
David Daney
|
c1bf207d6e
MIPS: kprobe: Add support.
|
15 rokov pred |
 Ralf Baechle
|
4483b15916
MIPS: Provide more elevant interface cu2_notifier for CP2 extensions.
|
15 rokov pred |
 Jesper Nilsson
|
55dc9d51a8
MIPS: Return after handling coprocessor 2 exception
|
15 rokov pred |
 Linus Torvalds
|
6969a43473
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
|
15 rokov pred |
 Julia Lawall
|
ed1bbdefc3
MIPS: Use set_cpus_allowed_ptr
|
15 rokov pred |
 Jason Wessel
|
5dd11d5d47
mips,kgdb: kdb low level trap catch and stack trace
|
15 rokov pred |
 Sebastian Andrzej Siewior
|
4f81b01a30
MIPS: Use CKSEG1ADDR for uncached handler
|
15 rokov pred |
 Yury Polyanskiy
|
ce384d83d0
MIPS: die() does not call die notifier chain
|
15 rokov pred |
|
David Daney
|
f6be75d03c
MIPS: Calculate proper ebase value for 64-bit kernels
|
15 rokov pred |
 Florian Fainelli
|
92bbe1b988
MIPS: Deal with larger physical offsets
|
15 rokov pred |
|
Florian Fainelli
|
2d1b6e9551
MIPS: Annotate set_except_vector with __init
|
15 rokov pred |
 Wu Zhangjin
|
f4fc580bec
MIPS: Fixup of the r4k timer
|
15 rokov pred |
 David VomLehn
|
010c108d7a
MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs
|
15 rokov pred |
|
Ralf Baechle
|
137f6f3e28
MIPS: Cleanup signal code initialization
|
15 rokov pred |
|
Ralf Baechle
|
69f3a7de1f
MIPS: Modularize COP2 handling
|
15 rokov pred |
|
Ralf Baechle
|
f1e39a4a61
MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler
|
15 rokov pred |
|
David Daney
|
4bb1a1089e
MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
|
16 rokov pred |
|
David Daney
|
fbeda19f82
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
|
16 rokov pred |
|
Ralf Baechle
|
b72b7092f8
MIPS: Use BUG_ON() where possible.
|
16 rokov pred |
 Chris Dearman
|
9fb4c2b9e0
MIPS: R2: Fix problem with code that incorrectly modifies ebase.
|
16 rokov pred |
|
David Daney
|
8bc6d05b48
MIPS: Read watch registers with interrupts disabled.
|
16 rokov pred |
|
Ralf Baechle
|
42fe7ee31f
MIPS: R2: Fix broken installation of cache error handler.
|
16 rokov pred |
|
David Daney
|
f9bb4cf37a
MIPS: For Cavium OCTEON set hwrena and lazily restore CP2 state.
|
16 rokov pred |
|
Ralf Baechle
|
ba3049ed40
MIPS: Switch FPU emulator trap to BREAK instruction.
|
16 rokov pred |
|
David Daney
|
566f74f6b2
MIPS: Consider value of c0_ebase when computing value of exception base.
|
16 rokov pred |
 David Daney
|
b67b2b7030
MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.
|
16 rokov pred |
 Kevin D. Kissell
|
9cc123631b
[MIPS] SMTC: Fix holes in SMTC and FPU affinity support.
|
16 rokov pred |
 Atsushi Nemoto
|
c65a5480ff
[MIPS] Fix potential latency problem due to non-atomic cpu_wait.
|
17 rokov pred |
