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@@ -34,15 +34,15 @@ void bfin_reset(void)
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bfin_write_SWRST(0x7);
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/* Due to the way reset is handled in the hardware, we need
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- * to delay for 7 SCLKS. The only reliable way to do this is
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- * to calculate the CCLK/SCLK ratio and multiply 7. For now,
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+ * to delay for 10 SCLKS. The only reliable way to do this is
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+ * to calculate the CCLK/SCLK ratio and multiply 10. For now,
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* we'll assume worse case which is a 1:15 ratio.
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*/
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asm(
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"LSETUP (1f, 1f) LC0 = %0\n"
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"1: nop;"
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:
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- : "a" (15 * 7)
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+ : "a" (15 * 10)
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: "LC0", "LB0", "LT0"
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);
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