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@@ -592,6 +592,20 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
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* this with a cache invalidate to mark the cache line invalid. And do all
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* this with interrupts disabled, to avoid the cache line being accidently
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* evicted while it is holding garbage.
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+ *
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+ * This also breaks in a number of circumstances:
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+ * - if there are modifications to the region of memory just above
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+ * empty_zero_page (for example because a breakpoint has been placed
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+ * there), then these can be lost.
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+ *
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+ * This is because the the memory address which the cache temporarily
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+ * caches in the above description is empty_zero_page. So the
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+ * movca.l hits the cache (it is assumed that it misses, or at least
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+ * isn't dirty), modifies the line and then invalidates it, losing the
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+ * required change.
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+ *
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+ * - If caches are disabled or configured in write-through mode, then
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+ * the movca.l writes garbage directly into memory.
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*/
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static void __flush_dcache_segment_1way(unsigned long start,
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unsigned long extent_per_way)
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@@ -641,6 +655,25 @@ static void __flush_dcache_segment_1way(unsigned long start,
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} while (a0 < a0e);
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}
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+#ifdef CONFIG_CACHE_WRITETHROUGH
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+/* This method of cache flushing avoids the problems discussed
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+ * in the comment above if writethrough caches are enabled. */
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+static void __flush_dcache_segment_2way(unsigned long start,
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+ unsigned long extent_per_way)
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+{
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+ unsigned long array_addr;
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+
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+ array_addr = CACHE_OC_ADDRESS_ARRAY |
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+ (start & cpu_data->dcache.entry_mask);
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+
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+ while (extent_per_way) {
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+ ctrl_outl(0, array_addr);
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+ ctrl_outl(0, array_addr + cpu_data->dcache.way_incr);
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+ array_addr += cpu_data->dcache.linesz;
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+ extent_per_way -= cpu_data->dcache.linesz;
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+ }
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+}
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+#else
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static void __flush_dcache_segment_2way(unsigned long start,
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unsigned long extent_per_way)
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{
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@@ -699,6 +732,7 @@ static void __flush_dcache_segment_2way(unsigned long start,
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a1 += linesz;
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} while (a0 < a0e);
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}
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+#endif
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static void __flush_dcache_segment_4way(unsigned long start,
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unsigned long extent_per_way)
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