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@@ -30,14 +30,12 @@
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#include <asm/machdep.h>
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#include <asm/dcr.h>
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#include <asm/dcr-regs.h>
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+#include <mm/mmu_decl.h>
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#include "ppc4xx_pci.h"
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static int dma_offset_set;
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-/* Move that to a useable header */
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-extern unsigned long total_memory;
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-
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#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL))
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#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32))
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@@ -105,7 +103,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
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/* Default */
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res->start = 0;
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- res->end = size = 0x80000000;
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+ size = 0x80000000;
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+ res->end = size - 1;
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res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
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/* Get dma-ranges property */
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@@ -167,13 +166,13 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
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*/
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if (size < total_memory) {
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printk(KERN_ERR "%s: dma-ranges too small "
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- "(size=%llx total_memory=%lx)\n",
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- hose->dn->full_name, size, total_memory);
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+ "(size=%llx total_memory=%llx)\n",
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+ hose->dn->full_name, size, (u64)total_memory);
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return -ENXIO;
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}
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/* Check we are a power of 2 size and that base is a multiple of size*/
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- if (!is_power_of_2(size) ||
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+ if ((size & (size - 1)) != 0 ||
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(res->start & (size - 1)) != 0) {
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printk(KERN_ERR "%s: dma-ranges unaligned\n",
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hose->dn->full_name);
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@@ -810,7 +809,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
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switch (port->index) {
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case 0:
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mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
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- mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136);
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+ mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
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mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
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mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);
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@@ -821,10 +820,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
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mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
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mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
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mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
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- mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136);
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- mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136);
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- mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136);
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- mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136);
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+ mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
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+ mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
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+ mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
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+ mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
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mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
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mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
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mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);
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