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@@ -231,6 +231,22 @@ static void atombios_blank_crtc(struct drm_crtc *crtc, int state)
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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}
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+static void atombios_powergate_crtc(struct drm_crtc *crtc, int state)
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+{
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+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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+ struct drm_device *dev = crtc->dev;
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+ struct radeon_device *rdev = dev->dev_private;
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+ int index = GetIndexIntoMasterTable(COMMAND, EnableDispPowerGating);
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+ ENABLE_DISP_POWER_GATING_PARAMETERS_V2_1 args;
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+
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+ memset(&args, 0, sizeof(args));
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+
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+ args.ucDispPipeId = radeon_crtc->crtc_id;
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+ args.ucEnable = state;
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+
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+ atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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+}
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+
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void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct drm_device *dev = crtc->dev;
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@@ -242,6 +258,9 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
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radeon_crtc->enabled = true;
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/* adjust pm to dpms changes BEFORE enabling crtcs */
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radeon_pm_compute_clocks(rdev);
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+ /* disable crtc pair power gating before programming */
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+ if (ASIC_IS_DCE6(rdev))
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+ atombios_powergate_crtc(crtc, ATOM_DISABLE);
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atombios_enable_crtc(crtc, ATOM_ENABLE);
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if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))
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atombios_enable_crtc_memreq(crtc, ATOM_ENABLE);
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@@ -259,6 +278,25 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
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atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);
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atombios_enable_crtc(crtc, ATOM_DISABLE);
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radeon_crtc->enabled = false;
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+ /* power gating is per-pair */
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+ if (ASIC_IS_DCE6(rdev)) {
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+ struct drm_crtc *other_crtc;
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+ struct radeon_crtc *other_radeon_crtc;
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+ list_for_each_entry(other_crtc, &rdev->ddev->mode_config.crtc_list, head) {
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+ other_radeon_crtc = to_radeon_crtc(other_crtc);
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+ if (((radeon_crtc->crtc_id == 0) && (other_radeon_crtc->crtc_id == 1)) ||
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+ ((radeon_crtc->crtc_id == 1) && (other_radeon_crtc->crtc_id == 0)) ||
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+ ((radeon_crtc->crtc_id == 2) && (other_radeon_crtc->crtc_id == 3)) ||
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+ ((radeon_crtc->crtc_id == 3) && (other_radeon_crtc->crtc_id == 2)) ||
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+ ((radeon_crtc->crtc_id == 4) && (other_radeon_crtc->crtc_id == 5)) ||
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+ ((radeon_crtc->crtc_id == 5) && (other_radeon_crtc->crtc_id == 4))) {
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+ /* if both crtcs in the pair are off, enable power gating */
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+ if (other_radeon_crtc->enabled == false)
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+ atombios_powergate_crtc(crtc, ATOM_ENABLE);
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+ break;
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+ }
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+ }
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+ }
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/* adjust pm to dpms changes AFTER disabling crtcs */
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radeon_pm_compute_clocks(rdev);
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break;
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