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@@ -186,7 +186,7 @@ EXPORT(nlm_boot_siblings)
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* jump to the secondary wait function.
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*/
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mfc0 v0, CP0_EBASE, 1
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- andi v0, 0x7f /* v0 <- node/core */
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+ andi v0, 0x3ff /* v0 <- node/core */
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/* Init MMU in the first thread after changing THREAD_MODE
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* register (Ax Errata?)
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@@ -263,6 +263,8 @@ NESTED(nlm_boot_secondary_cpus, 16, sp)
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PTR_L gp, 0(t1)
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/* a0 has the processor id */
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+ mfc0 a0, CP0_EBASE, 1
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+ andi a0, 0x3ff /* a0 <- node/core */
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PTR_LA t0, nlm_early_init_secondary
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jalr t0
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nop
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