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@@ -90,6 +90,29 @@ enum {
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ISP_CCP2_MODE_CCP2 = 1,
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};
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+/**
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+ * struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity
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+ * @pos: position of the lane
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+ * @pol: polarity of the lane
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+ */
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+struct isp_csiphy_lane {
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+ u8 pos;
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+ u8 pol;
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+};
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+
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+#define ISP_CSIPHY1_NUM_DATA_LANES 1
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+#define ISP_CSIPHY2_NUM_DATA_LANES 2
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+
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+/**
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+ * struct isp_csiphy_lanes_cfg - CCP2/CSI2 lane configuration
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+ * @data: Configuration of one or two data lanes
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+ * @clk: Clock lane configuration
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+ */
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+struct isp_csiphy_lanes_cfg {
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+ struct isp_csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES];
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+ struct isp_csiphy_lane clk;
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+};
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+
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/**
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* struct isp_ccp2_platform_data - CCP2 interface platform data
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* @strobe_clk_pol: Strobe/clock polarity
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@@ -109,6 +132,7 @@ struct isp_ccp2_platform_data {
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unsigned int ccp2_mode:1;
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unsigned int phy_layer:1;
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unsigned int vpclk_div:2;
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+ struct isp_csiphy_lanes_cfg lanecfg;
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};
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/**
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@@ -119,6 +143,7 @@ struct isp_ccp2_platform_data {
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struct isp_csi2_platform_data {
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unsigned crc:1;
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unsigned vpclk_div:2;
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+ struct isp_csiphy_lanes_cfg lanecfg;
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};
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struct isp_subdev_i2c_board_info {
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