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@@ -32,6 +32,31 @@
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#define GIC_DIST_CONFIG 0xc00
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#define GIC_DIST_SOFTINT 0xf00
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+#define GICH_HCR 0x0
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+#define GICH_VTR 0x4
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+#define GICH_VMCR 0x8
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+#define GICH_MISR 0x10
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+#define GICH_EISR0 0x20
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+#define GICH_EISR1 0x24
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+#define GICH_ELRSR0 0x30
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+#define GICH_ELRSR1 0x34
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+#define GICH_APR 0xf0
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+#define GICH_LR0 0x100
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+
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+#define GICH_HCR_EN (1 << 0)
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+#define GICH_HCR_UIE (1 << 1)
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+
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+#define GICH_LR_VIRTUALID (0x3ff << 0)
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+#define GICH_LR_PHYSID_CPUID_SHIFT (10)
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+#define GICH_LR_PHYSID_CPUID (7 << GICH_LR_PHYSID_CPUID_SHIFT)
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+#define GICH_LR_STATE (3 << 28)
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+#define GICH_LR_PENDING_BIT (1 << 28)
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+#define GICH_LR_ACTIVE_BIT (1 << 29)
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+#define GICH_LR_EOI (1 << 19)
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+
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+#define GICH_MISR_EOI (1 << 0)
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+#define GICH_MISR_U (1 << 1)
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+
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struct device_node;
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extern struct irq_chip gic_arch_extn;
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