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@@ -15,6 +15,9 @@
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#define ATPX_VERSION 0
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#define ATPX_GPU_PWR 2
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#define ATPX_MUX_SELECT 3
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+#define ATPX_I2C_MUX_SELECT 4
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+#define ATPX_SWITCH_START 5
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+#define ATPX_SWITCH_END 6
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#define ATPX_INTEGRATED 0
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#define ATPX_DISCRETE 1
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@@ -149,13 +152,35 @@ static int radeon_atpx_switch_mux(acpi_handle handle, int mux_id)
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return radeon_atpx_execute(handle, ATPX_MUX_SELECT, mux_id);
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}
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+static int radeon_atpx_switch_i2c_mux(acpi_handle handle, int mux_id)
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+{
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+ return radeon_atpx_execute(handle, ATPX_I2C_MUX_SELECT, mux_id);
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+}
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+
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+static int radeon_atpx_switch_start(acpi_handle handle, int gpu_id)
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+{
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+ return radeon_atpx_execute(handle, ATPX_SWITCH_START, gpu_id);
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+}
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+
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+static int radeon_atpx_switch_end(acpi_handle handle, int gpu_id)
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+{
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+ return radeon_atpx_execute(handle, ATPX_SWITCH_END, gpu_id);
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+}
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static int radeon_atpx_switchto(enum vga_switcheroo_client_id id)
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{
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+ int gpu_id;
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+
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if (id == VGA_SWITCHEROO_IGD)
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- radeon_atpx_switch_mux(radeon_atpx_priv.atpx_handle, 0);
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+ gpu_id = ATPX_INTEGRATED;
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else
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- radeon_atpx_switch_mux(radeon_atpx_priv.atpx_handle, 1);
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+ gpu_id = ATPX_DISCRETE;
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+
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+ radeon_atpx_switch_start(radeon_atpx_priv.atpx_handle, gpu_id);
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+ radeon_atpx_switch_mux(radeon_atpx_priv.atpx_handle, gpu_id);
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+ radeon_atpx_switch_i2c_mux(radeon_atpx_priv.atpx_handle, gpu_id);
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+ radeon_atpx_switch_end(radeon_atpx_priv.atpx_handle, gpu_id);
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+
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return 0;
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}
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