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@@ -16,6 +16,58 @@
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#include "ath9k.h"
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+/*
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+ * AR9285
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+ * ======
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+ *
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+ * EEPROM has 2 4-bit fields containing the card configuration.
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+ *
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+ * antdiv_ctl1:
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+ * ------------
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+ * bb_enable_ant_div_lnadiv : 1
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+ * bb_ant_div_alt_gaintb : 1
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+ * bb_ant_div_main_gaintb : 1
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+ * bb_enable_ant_fast_div : 1
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+ *
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+ * antdiv_ctl2:
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+ * -----------
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+ * bb_ant_div_alt_lnaconf : 2
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+ * bb_ant_div_main_lnaconf : 2
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+ *
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+ * The EEPROM bits are used as follows:
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+ * ------------------------------------
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+ *
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+ * bb_enable_ant_div_lnadiv - Enable LNA path rx antenna diversity/combining.
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+ * Set in AR_PHY_MULTICHAIN_GAIN_CTL.
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+ *
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+ * bb_ant_div_[alt/main]_gaintb - 0 -> Antenna config Alt/Main uses gaintable 0
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+ * 1 -> Antenna config Alt/Main uses gaintable 1
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+ * Set in AR_PHY_MULTICHAIN_GAIN_CTL.
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+ *
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+ * bb_enable_ant_fast_div - Enable fast antenna diversity.
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+ * Set in AR_PHY_CCK_DETECT.
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+ *
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+ * bb_ant_div_[alt/main]_lnaconf - Alt/Main LNA diversity/combining input config.
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+ * Set in AR_PHY_MULTICHAIN_GAIN_CTL.
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+ * 10=LNA1
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+ * 01=LNA2
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+ * 11=LNA1+LNA2
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+ * 00=LNA1-LNA2
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+ *
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+ * AR9485 / AR9565 / AR9331
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+ * ========================
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+ *
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+ * The same bits are present in the EEPROM, but the location in the
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+ * EEPROM is different (ant_div_control in ar9300_BaseExtension_1).
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+ *
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+ * ant_div_alt_lnaconf ==> bit 0~1
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+ * ant_div_main_lnaconf ==> bit 2~3
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+ * ant_div_alt_gaintb ==> bit 4
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+ * ant_div_main_gaintb ==> bit 5
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+ * enable_ant_div_lnadiv ==> bit 6
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+ * enable_ant_fast_div ==> bit 7
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+ */
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+
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static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
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int mindelta, int main_rssi_avg,
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int alt_rssi_avg, int pkt_count)
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Sujith Manoharan