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@@ -290,7 +290,7 @@
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/* HW REV */
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-#define CSR_HW_REV_TYPE_MSK (0x00000F0)
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+#define CSR_HW_REV_TYPE_MSK (0x00001F0)
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#define CSR_HW_REV_TYPE_3945 (0x00000D0)
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#define CSR_HW_REV_TYPE_4965 (0x0000000)
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#define CSR_HW_REV_TYPE_5300 (0x0000020)
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@@ -303,7 +303,12 @@
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#define CSR_HW_REV_TYPE_6150 (0x0000084)
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#define CSR_HW_REV_TYPE_6x05 (0x00000B0)
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#define CSR_HW_REV_TYPE_6x30 CSR_HW_REV_TYPE_6x05
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-#define CSR_HW_REV_TYPE_NONE (0x00000F0)
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+#define CSR_HW_REV_TYPE_6x35 CSR_HW_REV_TYPE_6x05
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+#define CSR_HW_REV_TYPE_2x30 (0x00000C0)
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+#define CSR_HW_REV_TYPE_2x00 (0x0000100)
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+#define CSR_HW_REV_TYPE_200 (0x0000110)
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+#define CSR_HW_REV_TYPE_230 (0x0000120)
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+#define CSR_HW_REV_TYPE_NONE (0x00001F0)
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/* EEPROM REG */
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#define CSR_EEPROM_REG_READ_VALID_MSK (0x00000001)
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