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@@ -151,6 +151,7 @@ enum piix_controller_ids {
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piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
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ich8_sata_snb,
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ich8_2port_sata_snb,
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+ ich8_2port_sata_byt,
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};
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struct piix_map_db {
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@@ -334,6 +335,9 @@ static const struct pci_device_id piix_pci_tbl[] = {
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{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
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/* SATA Controller IDE (Wellsburg) */
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{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
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+ /* SATA Controller IDE (BayTrail) */
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+ { 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
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+ { 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
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{ } /* terminate list */
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};
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@@ -441,6 +445,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
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[tolapai_sata] = &tolapai_map_db,
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[ich8_sata_snb] = &ich8_map_db,
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[ich8_2port_sata_snb] = &ich8_2port_map_db,
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+ [ich8_2port_sata_byt] = &ich8_2port_map_db,
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};
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static struct pci_bits piix_enable_bits[] = {
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@@ -1254,6 +1259,16 @@ static struct ata_port_info piix_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &piix_sata_ops,
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},
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+
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+ [ich8_2port_sata_byt] =
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+ {
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+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA2,
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &piix_sata_ops,
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+ },
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+
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};
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#define AHCI_PCI_BAR 5
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