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@@ -568,18 +568,35 @@
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80120000 0x1000>;
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interrupts = <0 11 0x4>;
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+
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+ dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
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+ <&dma 13 0 0x0>; /* Logical - MemToDev */
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+ dma-names = "rx", "tx";
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+
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status = "disabled";
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};
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+
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uart@80121000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80121000 0x1000>;
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interrupts = <0 19 0x4>;
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+
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+ dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
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+ <&dma 12 0 0x0>; /* Logical - MemToDev */
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+ dma-names = "rx", "tx";
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+
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status = "disabled";
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};
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+
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uart@80007000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80007000 0x1000>;
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interrupts = <0 26 0x4>;
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+
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+ dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
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+ <&dma 11 0 0x0>; /* Logical - MemToDev */
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+ dma-names = "rx", "tx";
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+
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status = "disabled";
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};
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