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@@ -261,35 +261,14 @@ extern inline void add_10bit(u32 *v, int n)
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* txdma tx descriptor cache write index reg in txdma address map at 0x1030
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*
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* txdma error reg in txdma address map at address 0x1034
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+ * 0: PyldResend
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+ * 1: PyldRewind
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+ * 4: DescrResend
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+ * 5: DescrRewind
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+ * 8: WrbkResend
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+ * 9: WrbkRewind
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*/
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-typedef union _TXDMA_ERROR_t {
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- u32 value;
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- struct {
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-#ifdef _BIT_FIELDS_HTOL
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- u32 unused3:22; /* bits 10-31 */
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- u32 WrbkRewind:1; /* bit 9 */
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- u32 WrbkResend:1; /* bit 8 */
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- u32 unused2:2; /* bits 6-7 */
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- u32 DescrRewind:1; /* bit 5 */
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- u32 DescrResend:1; /* bit 4 */
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- u32 unused1:2; /* bits 2-3 */
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- u32 PyldRewind:1; /* bit 1 */
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- u32 PyldResend:1; /* bit 0 */
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-#else
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- u32 PyldResend:1; /* bit 0 */
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- u32 PyldRewind:1; /* bit 1 */
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- u32 unused1:2; /* bits 2-3 */
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- u32 DescrResend:1; /* bit 4 */
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- u32 DescrRewind:1; /* bit 5 */
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- u32 unused2:2; /* bits 6-7 */
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- u32 WrbkResend:1; /* bit 8 */
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- u32 WrbkRewind:1; /* bit 9 */
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- u32 unused3:22; /* bits 10-31 */
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-#endif
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- } bits;
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-} TXDMA_ERROR_t, *PTXDMA_ERROR_t;
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-
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/*
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* Tx DMA Module of JAGCore Address Mapping
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* Located at address 0x1000
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@@ -308,7 +287,7 @@ typedef struct _TXDMA_t { /* Location: */
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u32 service_complete; /* 0x1028 */
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u32 cache_rd_index; /* 0x102C */
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u32 cache_wr_index; /* 0x1030 */
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- TXDMA_ERROR_t TxDmaError; /* 0x1034 */
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+ u32 TxDmaError; /* 0x1034 */
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u32 DescAbortCount; /* 0x1038 */
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u32 PayloadAbortCnt; /* 0x103c */
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u32 WriteBackAbortCnt; /* 0x1040 */
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