On some CPU the write to pagemask might complete before the TLB write instruction reads from the pagemask register. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
@@ -320,6 +320,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
tlb_write_random();
else
tlb_write_indexed();
+ tlbw_use_hazard();
write_c0_pagemask(PM_DEFAULT_MASK);
} else
#endif