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@@ -353,8 +353,8 @@ static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
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lcd_enable_raster();
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}
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-/* Configure the Burst Size of DMA */
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-static int lcd_cfg_dma(int burst_size)
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+/* Configure the Burst Size and fifo threhold of DMA */
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+static int lcd_cfg_dma(int burst_size, int fifo_th)
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{
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u32 reg;
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@@ -378,6 +378,9 @@ static int lcd_cfg_dma(int burst_size)
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default:
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return -EINVAL;
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}
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+
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+ reg |= (fifo_th << 8);
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+
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lcdc_write(reg, LCD_DMA_CTRL_REG);
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return 0;
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@@ -679,8 +682,8 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
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lcdc_write((lcdc_read(LCD_RASTER_TIMING_2_REG) &
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~LCD_INVERT_PIXEL_CLOCK), LCD_RASTER_TIMING_2_REG);
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- /* Configure the DMA burst size. */
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- ret = lcd_cfg_dma(cfg->dma_burst_sz);
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+ /* Configure the DMA burst size and fifo threshold. */
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+ ret = lcd_cfg_dma(cfg->dma_burst_sz, cfg->fifo_th);
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if (ret < 0)
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return ret;
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