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@@ -63,7 +63,7 @@ static DEFINE_SPINLOCK(r_tpu_lock);
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#define TGRC 8 /* Timer general register C (+0x20) */
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#define TGRD 9 /* Timer general register D (+0x24) */
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-static inline unsigned short r_tpu_read(struct r_tpu_priv *p, int reg_nr)
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+static inline u16 r_tpu_read(struct r_tpu_priv *p, int reg_nr)
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{
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struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
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void __iomem *base = p->mapbase;
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@@ -75,8 +75,7 @@ static inline unsigned short r_tpu_read(struct r_tpu_priv *p, int reg_nr)
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return ioread16(base + offs);
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}
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-static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr,
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- unsigned short value)
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+static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr, u16 value)
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{
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struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
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void __iomem *base = p->mapbase;
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@@ -93,7 +92,8 @@ static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr,
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static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
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{
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struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
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- unsigned long flags, value;
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+ unsigned long flags;
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+ u16 value;
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/* start stop register shared by multiple timer channels */
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spin_lock_irqsave(&r_tpu_lock, flags);
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