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@@ -2085,12 +2085,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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u32 render_irqs;
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u32 hotplug_mask;
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
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- if (HAS_BSD(dev))
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
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- if (HAS_BLT(dev))
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
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-
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dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
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dev_priv->irq_mask = ~display_mask;
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@@ -2160,12 +2154,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
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u32 render_irqs;
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u32 hotplug_mask;
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
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- if (HAS_BSD(dev))
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
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- if (HAS_BLT(dev))
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
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-
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dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
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dev_priv->irq_mask = ~display_mask;
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@@ -2216,11 +2204,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
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dev_priv->irq_mask = ~enable_mask;
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-
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
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- DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
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-
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dev_priv->pipestat[0] = 0;
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dev_priv->pipestat[1] = 0;
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