|
@@ -205,6 +205,7 @@ enum {
|
|
HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */
|
|
HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */
|
|
HC_MAIN_RSVD_SOC = (0x3fffffb << 6), /* bits 31-9, 7-6 */
|
|
HC_MAIN_RSVD_SOC = (0x3fffffb << 6), /* bits 31-9, 7-6 */
|
|
HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE |
|
|
HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE |
|
|
|
|
+ PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
|
|
PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT |
|
|
PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT |
|
|
HC_MAIN_RSVD),
|
|
HC_MAIN_RSVD),
|
|
HC_MAIN_MASKED_IRQS_5 = (PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
|
|
HC_MAIN_MASKED_IRQS_5 = (PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
|